Conventionally in a liquid crystal display device, voltage modulation in which a driving voltage for liquid crystal cells is varied so as to change light transmittance of the liquid crystal cells has been adopted. For 64-gradation display, for example, one voltage out of 64 gradation voltages is selected in accordance with a video signal, and the selected voltage is applied to the liquid crystal cell.
FIG. 37 is a circuit diagram showing a configuration of a gradation potential generating circuit 200 generating 64 gradation potentials V1d to V64d in such a liquid crystal display device. In FIG. 37, gradation potential generating circuit 200 includes resistance elements R1 to R65 and current amplifier circuits 201.1 to 201.64.
Resistance elements R1 to R65 connected in series between nodes N201 and N200 divide a voltage between nodes N201 and N200 to generate 64 gradation potentials V1d to V64d. Potentials applied to nodes N200 and N201 are alternately switched in a prescribed cycle in order to prevent deterioration of the liquid crystal cells. FIG. 37 shows a state in which a high potential VH and a low potential VL are applied to nodes N200 and N201 respectively.
Each of current amplifier circuits 201.1 to 201.64 includes a pull-up transistor and a pull-down transistor. The pull-up transistor and the pull-down transistor both have large current drivability. Current amplifier circuits 201.1 to 201.64 output potentials V1d to V64d of a level the same as gradation potentials V1d to V64d generated in resistance elements R1 to R65 respectively.
In such gradation potential generating circuit 200, however, when transistors in current amplifier circuits 201.1 to 201.64 have various threshold voltages, both the pull-up transistor and the pull-down transistor are simultaneously rendered conductive depending on an input potential, leading to a flow of a large through current. If such a large through current flows, power consumption in the liquid crystal display device is increased.
FIG. 38 is a circuit diagram showing a configuration of a conventional current amplifier circuit 210. Such a current amplifier circuit 210 is disclosed, for example, in Japanese Patent Laying-Open No. 2002-123326. In FIG. 38, current amplifier circuit 210 includes resistance elements 211 to 213, a pull-type driving circuit 214 and a push-type driving circuit 215. Resistance elements 211 to 213 connected in series between nodes N210 and N213 divide a voltage VH−VL between nodes N210 and N213 to generate an upper limit potential V211 and a lower limit potential V212. Pull-type driving circuit 214 includes an N-type transistor for pull-down, and causes a current to flow out from an output node N215 when a potential VO of output node N215 is higher than upper limit potential V211. Push-type driving circuit 215 includes a P-type transistor for pull-up, and causes a current to flow into output node N215 when potential VO of output node N215 is lower than lower limit potential V212. In this manner, output potential VO is maintained between upper limit potential V211 and lower limit potential V212.
Even in current amplifier circuit 210, however, when transistors in driving circuits 214 and 215 have various threshold voltages, the N-type transistor for pull-up and the P-type transistor for pull-down may simultaneously be rendered conductive, and a large through current flows.